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LPC55S6X 데이터시트(PDF) 91 Page - NXP Semiconductors

부품명 LPC55S6X
상세설명  32-bit Arm Cortex짰-M33; M33 coprocessor, TrustZone, PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS,Flexcomm Interface, SDIO, 32-bit counter/ timers,SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC,Comparator, Temperature Sensor, AES, PUF, SHA, CRC, RNG
PDF  128 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC55S6X 데이터시트(HTML) 91 Page - NXP Semiconductors

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LPC55S6x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheet
Rev. 1.9 — 10 February 2020
91 of 128
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
11.11 High-Speed SPI interface (Flexcomm Interface 8)
The actual SPI bit rate depends on the delays introduced by the external trace, the
external device, system clock (CCLK), and capacitive loading. Excluding delays
introduced by external device and PCB, the maximum supported bit rate for SPI master
mode (transmit/receive) and for SPI slave mode (transmit/receive) is 50 Mbit/s.
[1]
Based on simulated values. Not tested in production.
Table 33.
SPI dynamic characteristics[1]
Tamb = 40 C to 105 C; VDD = 1.8 V to 3.6 V; CL = 10 pF balanced loading on all pins; Input slew = 1 ns, SLEW setting =
fast mode for all pins;. Parameters sampled at the 50% level of the rising or falling edge.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SPI master
tDS
data set-up time
4
-
-
ns
tDH
data hold time
0
-
-
ns
tv(Q)
data output valid time
3
-
8
ns
SPI slave
tDS
data set-up time
4
-
-
ns
tDH
data hold time
0
-
-
ns
tv(Q)
data output valid time
6
-
15
ns



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