UPD360 datasheet(48/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 48

 2016-2017 Microchip Technology Inc.

8.5.9

HARDWARE CONTROL REGISTER (HW_CTL)

8.5.10

I2C SLAVE ADDRESS REGISTER (I2C_ADDR) (UPD360-A/UPD360-B ONLY)

Note 8-2

The default value for this register is defined by the CFG_SEL1 pin.

Address:

0018h

Size:

16 bits

Bits

Description

Type

Default

15:6

RESERVED

I2C_GEN_CALL_EN

0: I2C General Call address not supported.

1: I2C General Call address supported.

R/W

RESERVED

I2C FMPLUS

When set, this bit configures the I2C interface to operate in fast-mode plus

mode.

Note:

UPD360-A/UPD360-B only.

R/W

DEV_READY

When set, this bit indicates that the device has been fully configured after a

system level reset event.

R/SC

PIO_UPD_REQ

When this bit is set, the PIO registers are updated from the respective

simultaneous update registers.

After the operation completes, this bit is automatically cleared.

The request will not be accepted if an override function is pending. After the

override condition is cleared by software, the update request will be

accepted. The override is cleared via respective bit of PIO Override Enable

R/SC

SRESET

Software reset. When set this bit initiates a chip level reset.

Address:

001Ah

Size:

8 bits

Bits

Description

Type

Default

RESERVED

6:0

I2C Slave Address

Defines the slave address used by the I2C controller.

R/W

Note 8-2

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