JS28F256P30T85 datasheet(92/102 Pages) INTEL

92 / 102 page

1-Gbit P30 Family

April 2005

Intel StrataFlash® Embedded Memory (P30)

Datasheet

Order Number: 306666, Revision: 001

Figure 47.

Protection Register Programming Flowchart

FULL STATUS CHECK PROCEDURE

Program Protection Register operation addresses must be

within the Protection Register address space. Addresses

outside this space will return an error.

Repeat for subsequent programming operations.

Full Status Register check can be done after each program, or

after a sequence of program operations.

Write 0xFF after the last operation to set Read Array state.

Only the Clear Staus Register command clears SR[1, 3, 4].

If an error is detected, clear the Status register before

attempting a program retry or other error recovery.

PROTECTION REGISTER PROGRAMMING PROCEDURE

Start

Write 0xC0,

PR Address

Write PR

Address & Data

Read Status

SR[7] =

Full Status

Check

(if desired)

Program

Complete

Read Status

Program

Successful

SR[3] =

SR[4] =

SR[1] =

Range Error

Program Error

Program Aborted

Idle

Bus

Operation

None

Command

Check SR[3]:

1 =V

PP Range Error

Check SR[4]:

1 =Programming Error

Comments

Write

Idle

Program

PR Setup

Protection

Program

None

Data = 0xC0

Addr = First Location to Program

Data = Data to Program

Addr = Location to Program

Check SR[7]:

1 = WSM Ready

0 = WSM Busy

Bus

Operation

Command

Comments

Read

None

Status Register Data.

Idle

None

Check SR[1]:

1 =Block locked; operation aborted

(Program Setup)

(Confirm Data)

JS28F256P30T85 데이터시트(PDF) 92 Page - Intel Corporation

JS28F256P30T85 데이터시트(HTML) 92 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL