PCF8564A datasheet(31/65 Pages) NXP

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PCF85063A

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Product data sheet

Rev. 7 — 30 March 2018

31 of 65

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

When the counter decrements from 1, the timer flag (bit TF in register Control_2) is set

and the counter automatically re-loads and starts the next timer period.

If a new value of T is written before the end of the current timer period, then this value

takes immediate effect. NXP does not recommend changing T without first disabling the

counter by setting bit TE logic 0. The update of T is asynchronous to the timer clock.

Therefore changing it without setting bit TE logic 0 may result in a corrupted value loaded

into the countdown counter. This results in an undetermined countdown period for the first

period. The countdown value T will, however, be correctly stored and correctly loaded on

subsequent timer periods.

When the TIE flag is set, an interrupt signal on INT is generated if this mode is enabled.

See Section 8.2.2 for details on how the interrupt can be controlled.

When starting the timer for the first time, the first period has an uncertainty. The

uncertainty is a result of the enable instruction being generated from the interface clock

which is asynchronous from the timer source clock. Subsequent timer periods do not have

such delay. The amount of delay for the first timer period depends on the chosen source

clock, see Table 37.

In this example, it is assumed that the timer flag is cleared before the next countdown period

expires and that the pin INT is set to pulsed mode.

Fig 17. General countdown timer behavior

Table 37.

First period delay for timer counter value T

Timer source clock

Minimum timer period

Maximum timer period

4.096 kHz

T + 1

64 Hz

T + 1

1 Hz

1⁄60 Hz

–



64 Hz

--------------

64 Hz

--------------

–



64 Hz

--------------

64 Hz

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