PCF8564A datasheet(32/65 Pages) NXP

32 / 65 page

PCF85063A

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Product data sheet

Rev. 7 — 30 March 2018

32 of 65

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

At the end of every countdown, the timer sets the countdown timer flag (bit TF in register

Control_2). Bit TF can only be cleared by command. The asserted bit TF can be used to

generate an interrupt at pin INT. The interrupt may be generated as a pulsed signal every

countdown period or as a permanently active signal which follows the condition of bit TF.

Bit TI_TP is used to control this mode selection and the interrupt output may be disabled

with bit TIE, see Table 35 and Figure 17.

When reading the timer, the current countdown value is returned and not the initial

value T. Since it is not possible to freeze the countdown timer counter during read back, it

is recommended to read the register twice and check for consistent results.

Timer source clock frequency selection of 1 Hz and 1⁄60 Hz is affected by the Offset

For example, if a 100 s timer is set using the 1 Hz clock as source, then some 100 s

periods will contain correction pulses and therefore be longer or shorter depending on the

setting of the Offset register. See Section 8.2.3 to understand the operation of the Offset

8.6.3.1

Countdown timer interrupts

The pulse generator for the countdown timer interrupt uses an internal clock and is

dependent on the selected source clock for the countdown timer and on the countdown

value T. As a consequence, the width of the interrupt pulse varies (see Table 38).

[1]

T = loaded countdown value. Timer stops when T = 0.

Table 38.

INT operation

TF and INT become active simultaneously.

Source clock (Hz)

INT period (s)

T=1[1]

T> 1[1]

4096

1⁄8192

1⁄4096

1⁄128

1⁄64

1⁄60

1⁄64

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