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HD404816FS 데이터시트(PDF) 95 Page - Renesas Technology Corp

부품명 HD404816FS
상세설명  4-Bit Single-Chip Microcomputer
PDF  100 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD404816FS 데이터시트(HTML) 95 Page - Renesas Technology Corp

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HD404818 Series
93
2. The oscillator stabilization time is the period from when V
CC reaches 2.7 V (HD407L4818:
V
CC =
3.0 V) at power-on until the oscillator stabilizes. The time required to stabilize the oscillator (t
RC)
must be obtained. Since t
RC depends on the ceramic oscillator’s circuit constant and stray
capacitance, consult with the ceramic oscillator manufacturer.
3. See figure 48.
4. See figure 49. The unit t
cyc is applied when the MCU is in standby mode or active mode.
5. See figure 50.
6. See figure 49. The unit t
subcyc is applied when the MCU is in watch mode or subactive mode.
t
subcyc = 244.14 µs (when a 32.768-kHz crystal oscillator is used)
7. The analog comparator stabilization time is the period from when D
12/D13 is placed in analog
input mode until the analog comparator stabilizes and correct data can be read.
8. Applies to HD40L4812, HD40L4814, HD40L4816, and HD40L4818.
9. Applies to HD407L4818.
Serial Interface Timing Characteristics
During Transmit Clock Output (HD40L4812, HD40L4814, HD40L4816, HD40L4818: V
CC = 2.7 to 6
V; HD407L4818: V
CC = 3 to 5.5 V; GND = 0 V, Ta = –20°C to +75°C, unless otherwise specified)
Item
Symbol
Pin(s)
Min
Typ
Max
Unit
Test Condition
Notes
Transmit clock cycle time
t
Scyc
SCK
1
t
cyc /
t
subcyc
1, 2, 4
Transmit clock high and low
widths
t
SCKH,
t
SCKL
SCK
0.5
t
Scyc
1, 2
Transmit clock rise and fall
times
t
SCKr,
t
SCKf
SCK
200
ns
1, 2
Serial output data delay time t
DSO
SO
500
ns
1, 2
Serial input data setup time
t
SSI
SI
300
ns
1
Serial input data hold time
t
HSI
SI
300
ns
1



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