AD9083BBCZ datasheet(90/93 Pages) AD

90 / 93 page

AD9083

Data Sheet

Rev. 0 | Page 90 of 93

APPLICATIONS INFORMATION

EVALUATION BOARD INFORMATION

For information regarding the AD9083 evaluation board, visit

https://wiki.analog.com/resources/eval/ad9083.

POWER DELIVERY NETWORK

The power supplies needed to power the AD9083 are shown in

Table 31.

Table 31. Typical Power Supplies for AD9083

Domain

Voltage (V)

Tolerance (%)

AVDD

1.0

±5

AVDD1P8

1.8

±5

DVDD

1.0

±5

DVDD1P8

1.8

±5

The evaluation board uses the power delivery network shown

in Figure 93. Ferrite beads are used to isolate each of the supply

domains. The ferrite beads are sized to limit the IR drop across

it such that the ±5% regulation specification can still be

maintained. The DVDD supply does not use a ferrite due to its

high current draw.

The AD9083 can be driven directly from the dc-to-dc

converter. Note that this approach has risks in that more power

supply noise could be injected into the power supply domains

of the ADC. To minimize noise, follow the layout guidelines of

the dc-to-dc converter.

VOUT

5V TO 40V

1.0V

DVDD

AVDD

DVDD1P8

AVDD1P8

1.8V

LTM8074

VOUT

LTM8074

Figure 93. Simplified Power Solution for the AD9083

The user can employ several different decoupling capacitors to

cover both high and low frequencies. These capacitors must be

located close to the point of entry at the PCB level and close to

the devices, with minimal trace lengths.

LAYOUT GUIDELINES

The ADC evaluation board can be used as a guide to follow

good layout practices. The evaluation board layout is done in

such a way as to

•

Minimize coupling between the analog inputs.

•

Minimize clock coupling to the analog inputs.

•

Provide enough power and ground planes for the various

supply domains while reducing cross coupling.

•

Provide adequate thermal relief to the ADC.

Figure 94 shows the overall layout scheme used for the AD9083

evaluation board.

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