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AT90PWM2 데이터시트(PDF) 38 Page - ATMEL Corporation |
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AT90PWM2 데이터시트(HTML) 38 Page - ATMEL Corporation |
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38 / 365 page ![]() 38 AT90PWM2/3 4317B–AVR–02/05 ensure that a sufficient division factor is chosen if the selcted clock source has a higher frequency than the maximum frequency of the device at the present operating condi- tions. The device is shipped with the CKDIV8 Fuse programmed. Table 11. Clock Prescaler Select CLKPS3 CLKPS2 CLKPS1 CLKPS0 Clock Division Factor 0000 1 0001 2 0010 4 0011 8 0100 16 0101 32 0110 64 0111 128 1000 256 1001 Reserved 1010 Reserved 1011 Reserved 1100 Reserved 1101 Reserved 1110 Reserved 1111 Reserved |
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