ATMEGA640 datasheet(40/436 Pages) MICROCHIP

40 / 436 page

ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

10.2.3

Flash Clock – clkFLASH

The Flash clock controls operation of the Flash interface. The Flash clock is usually active simultaneously with the

CPU clock.

10.2.4

Asynchronous Timer Clock – clkASY

The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly from an external

clock or an external 32kHz clock crystal. The dedicated clock domain allows using this Timer/Counter as a real-

time counter even when the device is in sleep mode.

10.2.5

ADC Clock – clkADC

The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks in order to reduce

noise generated by digital circuitry. This gives more accurate ADC conversion results.

10.3 Clock Sources

The device has the following clock source options, selectable by Flash Fuse bits as shown below. The clock from

the selected source is input to the AVR clock generator, and routed to the appropriate modules.

Note:

1. For all fuses “1” means unprogrammed while “0” means programmed.

10.3.1

Default Clock Source

The device is shipped with internal RC oscillator at 8.0MHz and with the fuse CKDIV8 programmed, resulting in

1.0MHz system clock. The startup time is set to maximum and time-out period enabled. (CKSEL = "0010", SUT =

"10", CKDIV8 = "0"). The default setting ensures that all users can make their desired clock source setting using

any available programming interface.

10.3.2

Clock Start-up Sequence

Any clock source needs a sufficient VCC to start oscillating and a minimum number of oscillating cycles before it

can be considered stable.

To ensure sufficient VCC, the device issues an internal reset with a time-out delay (tTOUT) after the device reset is

released by all other reset sources. “On-chip Debug System” on page 53 describes the start conditions for the

internal reset. The delay (tTOUT) is timed from the Watchdog Oscillator and the number of cycles in the delay is set

by the SUTx and CKSELx fuse bits. The selectable delays are shown in Table 10-2 on page 41. The frequency of

the Watchdog Oscillator is voltage dependent as shown in “Typical Characteristics” on page 373.

Table 10-1.

Device Clocking Options Select(1)

Device Clocking Option

CKSEL3:0

Low Power Crystal Oscillator

1111 - 1000

Full Swing Crystal Oscillator

0111 - 0110

Low Frequency Crystal Oscillator

0101 - 0100

Internal 128kHz RC Oscillator

0011

Calibrated Internal RC Oscillator

0010

External Clock

0000

Reserved

0001

ATMEGA640 데이터시트(PDF) 40 Page - Microchip Technology

ATMEGA640 데이터시트(HTML) 40 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL