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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATMEGA640 데이터시트(PDF) 84 Page - Microchip Technology |
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ATMEGA640 데이터시트(HTML) 84 Page - Microchip Technology |
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84 / 436 page  84 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A • PDI/RXD0/PCINT8 – Port E, Bit 0 PDI, SPI Serial Programming Data Input. During Serial Program Downloading, this pin is used as data input line for the ATmega1281/2561. For ATmega640/1280/2560 this function is placed on MOSI. RXD0, USART0 Receive Pin. Receive Data (Data input pin for the USART0). When the USART0 receiver is enabled this pin is configured as an input regardless of the value of DDRE0. When the USART0 forces this pin to be an input, a logical one in PORTE0 will turn on the internal pull-up. PCINT8, Pin Change Interrupt source 8: The PE0 pin can serve as an external interrupt source. Table 13-16 on page 84 and Table 13-17 on page 84 relates the alternate functions of Port E to the overriding sig- nals shown in Figure 13-5 on page 73. Note: 1. PDO/PDI only available at PE1/PE0 for ATmega1281/2561. Table 13-16. Overriding Signals for Alternate Functions PE7:PE4 Signal Name PE7/INT7/ICP3 PE6/INT6/T3 PE5/INT5/OC3C PE4/INT4/OC3B PUOE 0 0 0 0 PUOV 0 0 0 0 DDOE 0 0 0 0 DDOV 0 0 0 0 PVOE 0 0 OC3C ENABLE OC3B ENABLE PVOV 0 0 OC3C OC3B DIEOE INT7 ENABLE INT6 ENABLE INT5 ENABLE INT4 ENABLE DIEOV 1 1 1 1 DI INT7 INPUT/ICP3 INPUT INT7 INPUT/T3 INPUT INT5 INPUT INT4 INPUT AIO – – – – Table 13-17. Overriding Signals for Alternate Functions in PE3:PE0 Signal Name PE3/AIN1/OC3A PE2/AIN0/XCK0 PE1/PDO(1)/TXD0 PE0/PDI(1)/RXD0/PCINT8 PUOE 0 0 TXEN0 RXEN0 PUOV 0 0 0 PORTE0 • PUD DDOE 0 XCK0 OUTPUT ENABLE TXEN0 RXEN0 DDOV 0 1 1 0 PVOE OC3B ENABLE XCK0 OUTPUT ENABLE TXEN0 0 PVOV OC3B XCK0 OUTPUT TXD0 0 DIEOE 0 0 0 PCINT8 • PCIE1 DIEOV 0 0 0 1 DI 0 XCK0 INPUT – RXD0 PE0 0 0 0 PCINT8 INPUT AIO AIN1 INPUT AIN0 INPUT – – |
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