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ADL5369ACPZ-R7 데이터시트(PDF) 21 Page - Analog Devices

부품명 ADL5369ACPZ-R7
상세설명  300 MHz to 1100 MHz Balanced Mixer, LO Buffer, and RF Balun
PDF  23 Pages
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ADL5369ACPZ-R7 데이터시트(HTML) 21 Page - Analog Devices

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Data Sheet
ADL5369
Rev. A | Page 21 of 23
Table 8. Evaluation Board Configuration
Components
Description
Default Conditions
C2, C6, C8,
C20, C21
Power supply decoupling. Nominal supply decoupling consists of
a 10 μF capacitor to ground in parallel with a 10 pF capacitor to
ground positioned as close to the device as possible.
C2 = 10 μF (Size 0603),
C6, C8, C20, C21 = 10 pF (Size 0402)
C1, C4, C5
RF input interface. The input channels are ac-coupled through C1.
C4 and C5 provide bypassing for the center taps of the RF input baluns.
C1 = 100 pF (Size 0402), C4 = 10 pF (Size 0402),
C5 = 0.01 μF (Size 0402)
T1, R1, C24, C25
IF output interface. T1 is a 1:1 impedance transformer used to provide
a single-ended IF output interface. Remove R1 for balanced output
operation. C24 and C25 are used to block the dc bias at the IF ports.
T1 = TC1-1-13M+ (Mini-Circuits),
R1 = 0 Ω (Size 0402),
C24, C25 = 560 pF (Size 0402)
C10, C12, R4
LO interface. C10 and C12 provide ac coupling for the LO1_IN and
LO2_IN local oscillator inputs. LOSEL selects the appropriate LO input
for both mixer cores. R4 provides a pull-down to ensure that LO1_IN is
enabled when the LOSEL test point is logic low. LO2_IN is enabled
when LOSEL is pulled to logic high.
C10, C12 = 100 pF (Size 0402),
R4 = 10 kΩ (Size 0402)
R21
PWDN interface. R21 pulls the PWDN logic low and enables the device.
The PWR_UP test point allows the PWDN interface to be exercised
using the an external logic generator. Grounding the PWDN pin for
nominal operation is allowed. Using the PWDN pin when supply
voltages exceed 3.3 V is not allowed.
R21 = 10 kΩ (Size 0402)
C22, L3, R9, R14,
R22, R23, VGS0,
VGS1
Bias control. R22 and R23 form a voltage divider to provide 3 V for
logic control, bypassed to ground through C22. VGS0 and VGS1
jumpers provide programmability at the VGS0 and VGS1 pins. It is
recommended to pull these two pins to ground for nominal operation.
R9 sets the bias point for the internal LO buffers.
C22 = 1 nF (Size 0402), L3 = 0 Ω (Size 0603),
R9 = 1.7 kΩ (Size 0402), R14 = 910 Ω (Size 0402),
R22 = 10 kΩ (Size 0402), R23 = 15 kΩ (Size 0402),
VGS0 = VGS1 = 3-pin shunt



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