M28F420 datasheet(3/38 Pages) STMICROELECTRONICS

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Operation

BYTE

DQ0 - DQ7

DQ8 - DQ14

DQ15A-1

Read Word

VIL

VIH

Data Output

Read Byte

VIL

VIH

VIL

Data Output

Hi-Z

Address Input

Write Word

VIL

VIH

VIL

VIH

Data Input

Write Byte

VIL

VIH

VIL

VIH

VIL

Data Input

Hi-Z

Address Input

Output Disable

VIL

VIH

Hi-Z

Standby

VIH

Hi-Z

Power Down

VIL

Hi-Z

Note: X= VIL or VIH,VPP =VPPL or VPPH

Table 3. Operations

DESCRIPTION

The M28F410 and M28F420 FLASH MEMORIES

are non-volatile memories that may be erased

electrically at the block level and programmed by

byte or word. The interface is directly compatible

with most microprocessors. SO44 and TSOP56

packages are used.

Organization

The organization, as 512K x 8 or 256K x 16, is

selectable by an external BYTE signal. When

BYTE is Low and the x8 organization is selected,

the Data Input/Outputsignal DQ15 acts as Address

line A-1 and selects the lower or upper byte of the

memory word for output on DQ0-DQ7, DQ8-DQ14

remain high impedance. When BYTE is High the

memory uses the Address inputs A0-A17 and the

Data Input/OutputsDQ0-DQ15. Memory control is

provided by Chip Enable, Output Enable and Write

Enable inputs. A Reset/Power Down/Boot block

unlock, tri-level input, places the memory in deep

power down, normal operation or enables pro-

gramming and erasure of the Boot block.

Organi-

sation

Code

Device

BYTE

A1-A8 &

A10-A17

DQ0 -

DQ7

DQ8 -

DQ14

DQ15

A-1

Word-

wide

Manufact.

Code

VIL

VIH

VIL

VID

Don’t

Care

20h

00h

Device

Code

M28F410

VIL

VIH

VID

Don’t

Care

0F2h

00h

M28F420

VIL

VIH

VID

Don’t

Care

0FAh

00h

Byte-

wide

Manufact.

Code

VIL

VIH

VIL

VID

Don’t

Care

20h

Hi-Z

Don’t

Care

Device

Code

M28F410

VIL

VIH

VIL

VIH

VID

Don’t

Care

0F2h

Hi-Z

Don’t

Care

M28F420

VIL

VIH

VIL

VIH

VID

Don’t

Care

0FAh

Hi-Z

Don’t

Care

Note: RP = VIH

Table 4. Electronic Signature

3/38

M28F410, M28F420

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