EMC1702 datasheet(39/60 Pages) MICROCHIP

39 / 60 page

EMC1702



2020 Microchip Technology Inc.

DS20006455A



‘1’ - The VSENSE voltage channel will not cause the ALERT pin to be asserted (if enabled).

Bit 6 - VSRC_MASK - Masks the ALERT pin from asserting when the VSOURCE value meets or

exceeds the high limit or drops below the low limit. This bit will have no effect on the THERM pin

functionality.



‘0’ (default) - The VSOURCE voltage channel will cause the ALERT pin to be asserted (if enabled).



‘1’ - The VSOURCE voltage channel will not cause the ALERT pin to be asserted (if enabled).

BIt 5 - PEAK_MASK - Masks the ALERT pin from asserting when the Peak Detector circuitry detects

a current spike. This bit will have no effect on the THERM pin functionality.



‘0’ (default) - The Peak Detector circuitry will cause the ALERT pin to be asserted (if enabled).



‘1’ - The Peak Detector circuitry will not cause the ALERT pin to be asserted (if enabled).

Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out-of-

limit or reports a diode fault.



‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out-of-

limit or reports a diode fault.



‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out-of-limit

or reports a diode fault.

Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out-

of-limit.



‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out-of-limit.



‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out-of-limit.

5.12 Consecutive Alert Register

The Consecutive Alert Register determines how many times an out-of-limit error or diode fault must

be detected in consecutive measurements before the interrupt status registers are asserted. This

applies to temperature limits only. The voltage measurement and current sense measurements are

controlled via the Voltage Channel Configuration register and Current Sense Configuration register

respectively (see Section 5.19 and Section 5.20).

When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode

fault and low limit errors and only increment if the measured temperature meets or exceeds the High

Limit.

Each measurement channel has a separate fault queue associated with the high limit, low limit, and

diode fault condition except the internal diode.

Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.



‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely

without the device resetting its SMBus protocol.



‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms,

the device will reset the SMBus protocol.

Bits 6-4 - CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the

corresponding Tcrit Limit before the THERM pin is asserted.

Table 5.13 Consecutive Alert Register

ADDR

R/W

DEFAULT

22h

R/W

Consecutive

Alert

TIME

OUT

CTHRM[2:0]

CALRT[2:0]

70h

EMC1702 데이터시트(PDF) 39 Page - Microchip Technology

EMC1702 데이터시트(HTML) 39 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

데이터시트 다운로드

링크 URL