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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DS31256 데이터시트(PDF) 136 Page - Maxim Integrated Products |
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DS31256 데이터시트(HTML) 136 Page - Maxim Integrated Products |
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136 / 183 page  DS31256 256-Channel, High-Throughput HDLC Controller 136 of 183 10.1.8 PCI Fast Back-to-Back Fast back-to-back transactions are two consecutive bus transactions without the usually required idle cycle ( PFRAME and PIRDY deasserted) between them. This can only occur when there is a guarantee that there is not any contention on the signal lines. The PCI specification allows two types of fast back- to-back transactions—those that access the same agent (Type 1) and those that do not (Type 2). Figure 10-9 shows an example of a fast back-to-back transaction where no idle cycle exists. As a bus master, the DS31256 cannot perform a Type 2 access. As a target, it can accept both types of fast back- to-back transactions. Figure 10-9. PCI Fast Back-To-Back 12 345 6789 10 data #1 Address CMD BE #1 PCLK PFRAME PAD PCBE PIRDY PTRDY PDEVSEL data #2 data #2 BE #2 BE #2 Address data #1 CMD BE #1 |
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