AD9959SLASHPCBZ datasheet(13/44 Pages) AD

13 / 44 page

Data Sheet

AD9959

Rev. C | Page 13 of 44

–170

–160

–150

–140

–130

–120

–110

–100

100

10k

100k

10M

FREQUENCY OFFSET (Hz)

75.1MHz

100.3MHz

40.1MHz

15.1MHz

Figure 16. Residual Phase Noise (SSB) with fOUT = 15.1 MHz, 40.1 MHz,

75.1 MHz, 100.3 MHz; fCLK = 500 MHz with REFCLK Multiplier Bypassed

–70

–170

10M

FREQUENCY OFFSET (Hz)

–80

–90

–100

–110

–120

–130

–140

–150

–160

100

10k

100k

100.3MHz

75.1MHz

15.1MHz

40.1MHz

Figure 17. Residual Phase Noise (SSB) with fOUT = 15.1 MHz, 40.1 MHz,

75.1 MHz, 100.3 MHz; fCLK = 500 MHz with REFCLK Multiplier = 5×

–70

–170

10M

FREQUENCY OFFSET (Hz)

–80

–90

–100

–110

–120

–130

–140

–150

–160

100

10k

100k

100.3MHz

75.1MHz

15.1MHz

40.1MHz

Figure 18. Residual Phase Noise (SSB) with fOUT = 15.1 MHz, 40.1 MHz,

75.1 MHz,100.3 MHz; fCLK = 500 MHz with REFCLK Multiplier = 20×

–60

–85

25.3

200.3

FREQUENCY OF COUPLING SPUR (MHz)

–65

–70

–75

–80

50.3

75.3

100.3

125.3

150.3

175.3

SEPARATE DAC POWER PLANES

SINGLE DAC POWER PLANE

Figure 19. Channel Isolation at 500 MSPS Operation; Conditions are Channel

of Interest Fixed at 110.3 MHz, the Other Channels Are Frequency Swept

600

500

REFERENCE CLOCK FREQUENCY (MHz)

500

400

300

200

100

450

400

350

300

250

200

150

100

3 CHANNELS ON

4 CHANNELS ON

2 CHANNELS ON

1 CHANNEL ON

Figure 20. Power Dissipation vs. Reference Clock Frequency vs. Channel(s)

Power On/Off

–45

–75

1.1

fOUT (MHz)

–50

–55

–60

–65

–70

15.1

40.1

75.1

100.3

200.3

SFDR AVERAGED

Figure 21. Averaged Channel SFDR vs. fOUT

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