DS0147 datasheet(83/128 Pages) MICROCHIP

83 / 128 page

Condition

Unit

Max

Typ

Min

Symbol

Parameter

bps (Tx VCO rate

1.6 GHz)

TXPLL in integer

mode

Data rate ≥ 800

Mbps to 1.6 G-

UI UI

0.11 0.02

TJ TDJ

Total jitter

5, 6, 13

Deterministic

jitter

5, 6

bps (Tx VCO rate

1.6 GHz)

TXPLL in fraction-

al mode

Data rate = 250

Mbps to 800 M-

UI UI

0.05 0.01

TJ TDJ

Total jitter

5, 6, 13

Deterministic

jitter

5, 6

bps (Tx VCO rate

1.48 GHz to 1.6

GHz)

TXPLL in integer

mode

Data rate = 250

Mbps to 800 M-

UI UI

0.06 0.01

TJ TDJ

Total jitter

5, 6, 13

Deterministic

jitter

5, 6

bps (Tx VCO rate

1.48 GHz to 1.6

GHz)

TXPLL in fraction-

al mode

1. Increased DC common mode settings above 50% reduce allowed VOD output swing capabilities.

2. Adjustable through transmit emphasis.

3. With estimated package differences.

4. Single PLL applies to all four lanes in the same quad location with the same TxPLL. Multiple PLL applies

to N lanes using multiple TxPLLs from different quad locations.

5. Improved jitter characteristics for a specific industry standard are possible in many cases due to improved

reference clock or higher VCO rate used.

6. Tx jitter is specified with all transmitters on the device enabled, a 10–12-bit error rate (BER) and Tx data

pattern of PRBS7.

7. From the PMA mode, the TX_ELEC_IDLE port to the XVCR TXP/N pins.

8. FTxRefClk = 75 MHz with typical settings.

9. For data rates greater than 10.3125 Gbps, VDDA must be set to 1.05 V mode. See supply tolerance in

the section Recommended Operating Conditions.

10. Transmit alignment in this case will automatically align upon the TX PLL obtaining lock. For details on

transmit alignment, see UG0677: PolarFire FPGA Transceiver User Guide.

11. In order to obtain the required alignment for these configurations, an FPGA fabric TX alignment circuit

must be implemented. For details on transmit alignment, see UG0677: PolarFire FPGA Transceiver User

Guide.

12. Refclk skew is the amount of skew between the reference clocks of the two PLL.

13. Jitter decomposition can be found in the protocol characterization reports.

Microsemi Proprietary and Confidential. DS0147 Revision 1.0

AC Switching Characteristics

DS0147 데이터시트(PDF) 83 Page - Microchip Technology

DS0147 데이터시트(HTML) 83 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL