CC1020-RTR1 datasheet(41/91 Pages) TI

41 / 91 page

CC1020

SWRS046

Page 41 of 92

Power down

Crystal oscillator and bias off

Frequency synthesizer off

Receive chain off

Wait for PLL

lock or timeout,

127 filter clocks

Turn on crystal oscillator/bias

Frequency synthesizer off

Receive chain off

Crystal oscillator and bias on

Turn on frequency synthesizer

Receive chain off

Optional waiting time before

turning on receive chain

Programmable:

32-256 ADC clocks

Crystal oscillator and bias on

Frequency synthesizer on

Turn on receive chain

Receive mode

Crystal oscillator and bias on

Frequency synthesizer on

Receive chain on

Wait for

carrier sense or timeout

Programmable: 20-72

filter clocks

Set

SEQ_ERROR

flag in STATUS

Optional calibration

Programmable: each time,

once in 16, or once in 256

Receive chain off

PLL in lock

PLL timeout

Sequencing wake-up event

Carrier sense timeout

Carrier sense

(negative transition on

PSEL pin or DIO pin)

(Positive transition on SEQ_PD in MAIN register)

Sequencing power-down event

Figure 19. Automatic power-up sequencing flow chart

Notes to Figure 19:

Filter clock (FILTER_CLK):

ChBW

clock

filter

⋅

= 2

where ChBW is defined on page 30.

ADC clock (ADC_CLK):

[] )1

(

⋅

DIV

ADC

xoscx

ADC

where ADC_DIV[2:0] is set in the MODEM

12.13. Automatic Frequency Control

CC1020 has a built-in feature called AFC

(Automatic Frequency Control) that can be

used to compensate for frequency drift.

The average frequency offset of the

received signal (from the nominal IF

frequency) can be read in the AFC

bit value AFC[7:0] can be used to

compensate for frequency offset between

transmitter and receiver.

The frequency offset is given by:

∆F = AFC·Baud rate / 16

The receiver can be calibrated against the

transmitter by changing the operating

frequency according to the measured

CC1020-RTR1 데이터시트(PDF) 41 Page - Texas Instruments

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