CC1020-RTR1 datasheet(13/91 Pages) TI

13 / 91 page

CC1020

SWRS046

Page 13 of 92

4.6.

Frequency Synthesizer Section

Parameter

Min

Typ

Max

Unit

Condition / Note

Phase noise, 402 – 470 MHz

12.5 kHz channel spacing

-90

-100

-105

-110

-114

dBc/Hz

Unmodulated carrier

At 12.5 kHz offset from carrier

At 25 kHz offset from carrier

At 50 kHz offset from carrier

At 100 kHz offset from carrier

At 1 MHz offset from carrier

Measured using loop filter

components given in Table 13.

The phase noise will be higher for

larger PLL loop filter bandwidth.

Phase noise, 804 – 940 MHz

25 kHz channel spacing

-85

-95

-101

-109

-118

dBc/Hz

Unmodulated carrier

At 12.5 kHz offset from carrier

At 25 kHz offset from carrier

At 50 kHz offset from carrier

At 100 kHz offset from carrier

At 1 MHz offset from carrier

Measured using loop filter

components given in Table 13.

The phase noise will be higher for

larger PLL loop filter bandwidth.

PLL loop bandwidth

12.5 kHz channel spacing, 433 MHz

25 kHz channel spacing, 868 MHz

2.7

8.3

kHz

After PLL and VCO calibration.

The PLL loop bandwidth is

programmable.

PLL lock time (RX / TX turn time)

12.5 kHz channel spacing, 433 MHz

25 kHz channel spacing, 868 MHz

500 kHz channel spacing

900

640

307.2 kHz frequency step to RF

frequency within ±10% of channel

spacing. Depends on loop filter

component values and PLL_BW

page 53 for more details.

PLL turn-on time. From power down

mode with crystal oscillator running.

12.5 kHz channel spacing, 433 MHz

25 kHz channel spacing, 868 MHz

500 kHz channel spacing

3.2

2.5

700

Time from writing to registers to

RF frequency within ±10% of

channel spacing. Depends on

loop filter component values and

PLL_BW register setting. See

Table 25 on page 53 for more

details.

Table 8. Frequency synthesizer parameters

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