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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L9960 데이터시트(PDF) 34 Page - STMicroelectronics |
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L9960 데이터시트(HTML) 34 Page - STMicroelectronics |
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34 / 95 page  Functional description L9960, L9960T 34/95 DS11115 Rev 10 Figure 15. Bridge STATE diagram in VVL mode Programming the bridge in normal or VVL mode is performed through dedicated SPI command to setup the MODE configuration bit: Note: (-) available in the D10 bit position in SPI command frame 5. The status of the VVL is echoed through a SPI configuration request Note: (-) available in the R11 bit position in SPI answer frame 7c. In VVL mode, once PWM is set to LOW, the bridge is put in tri-state after a programmable time “Tvvl” from 0us to 26ms by the register defined below. Table 33. VVL_MODE Bit status Description Condition 0 No VVL mode Reset value 1 VVL mode - PWM Forward Free Wheeling Forward DIR BRIDGE STATE DIS NDIS Reverse Tri state Free Wheeling Tri state Tvvl Tvvl GAPGPS02321 Table 34. VVL_MODE echo Bit status Description Condition 0 No VVL mode Reset value 1 VVL mode - Table 35. TVVL[3:0] (µs) 4 bits combination Description Condition 0000 0 Not to be used if IN1/IN2 interface is selected 0001 6.4 0010 12.6 0011 24.8 0100 50.4 - 0101 100 - 0110 200 - 0111 400 - |
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