| 전자부품 데이터시트 검색엔진 |
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SPSB081C5 데이터시트(PDF) 25 Page - STMicroelectronics |
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SPSB081C5 데이터시트(HTML) 25 Page - STMicroelectronics |
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25 / 135 page ![]() • Watchdog failure • Turn-on of the V1 regulator (VSREG power-on or wake-up from VBAT_standby mode) 3.9 DIAGN output Figure 15. DIAGN pin Data in 110 kΩ Data out GAPG1609151103CFT DIAGN pin can be directly connected to the microcontroller and it is pulled up to V1 voltage by internal pull-up resistor. DIAGN pin can be configured by DIAGN_EXT bit in normal mode or extended mode. In default DIAGN configuration (DIAGN_EXT =0), DIAGN pin is set low if a failure considered in fail safe mode occurs (for example, watchdog failure; V1 failure; thermal shutdown TSD2). As soon as the FS error source is cleared, the signal is pulled up to V1 voltage. In extended DIAGN configuration (DIAGN_EXT =1), DIAGN pin reflects one or more errors such as reported in the GLOBAL STATUS BYTE register by global status bit not (GSBN) and it is set to low if at least one error condition occurs. A bit register is available to mask each one of GSBN flags: • RSTB: MASK_RSTB (0x3F) • PLE: MASK_PLE (0x3F) • FE: MASK_FE (0x3F) • DE: MASK_DE (0x3F) • GW: MASK_GW (0x3F) Note: DIAGN is automatically configured in normal mode (DIAGN_EXT =0) after a reset event. 3.10 V1 overvoltage detection SPSB081 protects the MCU against voltages over 5 V (or 3V3) that could harm its functionalities. For this purpose, to sink the exceeding current accumulated in the external capacitor usually directed to the MCU, the SPSB081 uses an internal pulldown circuit, where output current flows through the pulldown resistor to ground. If the bit V1_OVP=1 in CR2 the overvoltage protection circuits is enabled. If V1_OVP =0 there is no overvoltage protection anymore. SPSB081 DIAGN output DS14048 - Rev 1 page 25/135 |
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