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FDA903D 데이터시트(PDF) 61 Page - STMicroelectronics |
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FDA903D 데이터시트(HTML) 61 Page - STMicroelectronics |
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61 / 82 page ![]() DocID031502 Rev 2 61/82 FDA903D I2C bus interface 81 Figure 72. Without/with auto-increment reading procedure If a microcontroller tries to read an undefined register, FDA903D will return a "0xFF" data; for more details refer directly to I2C specification. 14.3 Data validity The data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. 14.4 Start and stop conditions A start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. 14.5 Byte format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. 14.6 Acknowledge The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse. The receiver** has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. * Transmitter = master (μP) when it writes an address to the FDA903D = slave (FDA903D) when the μP reads a data byte from FDA903D ** Receiver = slave (FDA903D) when the μP writes an address to the FDA903D = master (μP) when it reads a data byte from FDA903D |
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