| 전자부품 데이터시트 검색엔진 |
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L9945 데이터시트(PDF) 27 Page - STMicroelectronics |
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L9945 데이터시트(HTML) 27 Page - STMicroelectronics |
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27 / 151 page ![]() Figure 14. Clamping for LS configuration To load To PGND CM IPU IPD VGBHI Internal clamping RG Control signal Control signal Device side Board side LS NFET GNSPxx SNGPxx DRNxx External clamping VBATT GADG2702171519PS Figure 14 shows the recommended clamping solutions for the LS configuration. Voltage on the DRNx pin has to be limited to prevent component damage. A suppressor circuit can be used to clamp the voltage on DRNx pin (AMR is 60 V). For the freewheeling of inductive loads: • A Zener feedback to the gate can be a solution to allow active freewheeling; • A diode on DRNx pin can be used to allow passive freewheeling towards battery. 5.4.6 Electrical characteristics The table below lists the electrical characteristics for the output pre-drivers. Note: Tj = Tj_op; VVPS_UV < VVPS < 60 V, all supplies are independent; 4.5 V < VDD5 < 5.5 V; 3.0 V < VIO < 5.5 V, unless otherwise noted. A current flowing out of L9945 has minus (-) sign; a current flowing into L9945 has plus (+) sign. Charge currents turn ON the NMOS and OFF the PMOS. Discharge currents turn OFF the NMOS and ON the PMOS. Table 15. Output pre-driver stages electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit VGNSP -VSNGP Gate Output voltage (Reversed for PMOS) - 10 - 14 V ICh3Gx Gate charge current NMOS GCC[1:0] = [1, 1] -1.88 - -1.1 mA Gate charge current PMOS -1.85 - -0.55 mA ICh2Gx Gate charge current NMOS and PMOS GCC[1:0] = [1, 0] -8.6 - -4 mA ICh1Gx Gate charge current NMOS and PMOS GCC[1:0] = [0, 1] -32.4 - -19.6 mA ICh0Gx Gate charge current NMOS GCC[1:0] = [0, 0] -100 - -40 mA Gate charge current PMOS -77 - -43.5 mA IDCh3Gx Gate discharge current NMOS and PMOS GCC[1:0] = [1, 1] 0.75 - 1.9 mA IDCh2Gx Gate discharge current NMOS and PMOS GCC[1:0] = [1, 0] 3.8 - 7.4 mA IDCh1Gx Gate discharge current NMOS and PMOS GCC[1:0] = [0, 1] 16.8 - 27.4 mA IDCh0Gx Gate discharge current NMOS and PMOS GCC[1:0] = [0, 0] 55 - 101 mA Tsw_GC Delay to switch from GCC[a,b] to GCC[c,d] - - - 0.1 µs L9945 Output pre-drivers DS12275 - Rev 8 page 27/151 |
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