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LSM6DSV16X 데이터시트(PDF) 69 Page - STMicroelectronics |
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LSM6DSV16X 데이터시트(HTML) 69 Page - STMicroelectronics |
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69 / 196 page ![]() 9.20 CTRL8 (17h) Control register 8 (R/W) Table 64. CTRL8 register HP_LPF2_ XL_BW_2 HP_LPF2_ XL_BW_1 HP_LPF2_ XL_BW_0 0(1) XL_DualC_EN 0(1) FS_XL_1 FS_XL_0 1. This bit must be set to 0 for the correct operation of the device. Table 65. CTRL8 register description HP_LPF2_XL_BW_[2:0] Accelerometer LPF2 and HP filter configuration and cutoff setting. Refer to Table 66. XL_DualC_EN Enables dual-channel mode. When this bit is set to 1, data with the maximum full scale are sent to the output registers at addresses 34h to 39h. The UI processing chain is used. Default value: 0 (0: disabled; 1: enabled) FS_XL_[1:0] Accelerometer full-scale selection: (00: ±2 g; 01: ±4 g; 10: ±8 g; 11: ±16 g) Table 66. Accelerometer bandwidth configurations Filter type HP_SLOPE_ XL_EN LPF2_XL_EN HP_LPF2_XL_BW_[2:0] Bandwidth Low pass 0 0 - ODR/2(1) 1 000 ODR/4 001 ODR/10 010 ODR/20 011 ODR/45 100 ODR/100 101 ODR/200 110 ODR/400 111 ODR/800 High pass 1 - 000 SLOPE (ODR/4) 001 ODR/10 010 ODR/20 011 ODR/45 100 ODR/100 101 ODR/200 110 ODR/400 111 ODR/800 1. This value is ODR/2 when the accelerometer is in high-performance mode, high-accuracy ODR mode and normal mode. It is equal to 2300 Hz when the accelerometer is in low-power mode 1 (2 mean), 912 Hz in low-power mode 2 (4 mean) and 431 Hz in low-power mode 3 (8 mean). LSM6DSV16X CTRL8 (17h) DS13510 - Rev 1 page 69/196 |
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