5.2

Read operations

Read operations are performed independently of the state of the write control (WC) signal.

After the successful completion of a read operation, the device internal address counter is incremented by one, to

point to the next byte address.

For the read instructions, after each byte read (data out), the device waits for an acknowledgement (data in)

during the 9th bit time. If the bus master does not acknowledge during this 9th time, the device terminates the data

transfer and switches to its standby mode after a stop condition.

Figure 10. Read mode sequences

Dev sel *

Byte addr

Byte addr

Dev sel

Data out 1

Data out N

Current

Address

Read

Dev sel

Data out

Random

Address

Read

Dev sel *

Data out

Sequential

Current

Read

Data out N

Dev sel *

Byte addr

Byte addr

Sequential

Random

Read

Dev sel *

Data out1

ACK

RW

NO ACK

ACK

RW

ACK

ACK

ACK

RW

ACK

ACK

ACK

NO ACK

RW

NO ACK

ACK

ACK

ACK

RW

ACK

ACK

RW

ACK

NO ACK

Note:

The seven most significant bits of the first device select code of a random read must be identical to the seven

most significant bits of the device select code of the write.

M24M02-DR M24M02-R

Read operations

DS7025 - Rev 11

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