SW52212 datasheet(17/71 Pages) SILABS

17 / 71 page

Parameter

Symbol

Condition

Min

Typ

Max

Jitter

Limit

Unit

PSNR2

Spurs Induced by External

Power Supply Noise on

VDDA, 100 mVpp Ripple

PSNR1.8V

100 kHz

200 kHz

300 kHz

500 kHz

1 MHz

—

–63.4

–61.5

–59.1

–54.5

–50.4

—

dBc

PSNR1.5V

100 kHz

200 kHz

300 kHz

500 kHz

1 MHz

—

–65.9

–63.9

–60.3

–53.5

–46.0

—

dBc

Intel QPI Specifications for 100 MHz and 133 MHz

Intel QPI and SMI REFCLK

accummulated jitter3, 4

JRMSQPI_SMI

8 Gb/s, 100 MHz, 12UI

—

0.13

0.22

0.3

(RMS)

Intel QPI and SMI REFCLK

accummulated jitter3, 4

JRMSQPI_SMI

9.6 Gb/s, 100 MHz, 12UI

—

0.11

0.19

0.2

(RMS)

Intel QPI & SMI REFCLK

accummulated jitter3, 6

JRMSQPI_SMI

6.4 Gb/s, 100/133 MHz, 12UI, 7.8M

—

0.15

0.35

0.5

(RMS)

Note:

1. The SRIS jitter limit is the system RefClk simulation budget divided by sqrt (2) for equal allocation of uncorrelated jitter between

two clocks.

2. For PSNR testing methodology, please see "AN491: Power Supply Rejection for Low-Jitter Clocks".

3. Post processed evaluation through Intel supplied Matlab scripts.

4. Measuring on 100 MHz output using the template file in the PCIe Jitter Tool.

5. Based on PCI Express® Base Specifications Revision 5.0 Version 0.7.

6. Measuring on 100 MHz, 133 MHz outputs using the template file in the PCIe Jitter Tool. Visit www.pcisig.com for complete PCIe

specifications.

Data Sheet

Electrical Specifications

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