| 전자부품 데이터시트 검색엔진 |
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SW52212 데이터시트(PDF) 34 Page - Silicon Laboratories |
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SW52212 데이터시트(HTML) 34 Page - Silicon Laboratories |
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34 / 71 page ![]() 8.9 Register Tables 8.9.1 Si52212 Registers Table 8.4. Control Register 0. Byte 0 Bit Name If Bit = 0 If Bit = 1 Type Default Function 7 DIFF7_OE Disabled Enabled RW 1 Output enable for DIFF[7] 6 DIFF6_OE Disabled Enabled RW 1 Output enable for DIFF[6] 5 DIFF5_OE Disabled Enabled RW 1 Output enable for DIFF[5] 4 DIFF4_OE Disabled Enabled RW 1 Output enable for DIFF[4] 3 DIFF3_OE Disabled Enabled RW 1 Output enable for DIFF[3] 2 DIFF2_OE Disabled Enabled RW 1 Output enable for DIFF[2] 1 DIFF1_OE Disabled Enabled RW 1 Output enable for DIFF[1] 0 DIFF0_OE Disabled Enabled RW 1 Output enable for DIFF[0] Table 8.5. Control Register 1. Byte 1 Bit Name If Bit = 0 If Bit = 1 Type Default Function 7 DIFF11_OE Disabled Enabled RW 1 Output enable for DIFF[11] 6 DIFF10_OE Disabled Enabled RW 1 Output enable for DIFF[10] 5 DIFF9_OE Disabled Enabled RW 1 Output enable for DIFF[9] 4 DIFF8_OE Disabled Enabled RW 1 Output enable for DIFF[8] 3 Reserved 0 Reserved 2 0 1 SS_EN_READ1 R 0 Spread Enable software readback 00 = –0.25%; 01 = OFF; 10 = OFF; 11 = –0.5% The value of SS_EN_READ is latched on power-up. 0 SS_EN_READ0 R 0 Table 8.6. Control Register 2. Byte 2 Bit Name If Bit = 0 If Bit = 1 Type Default Function 7 SS_EN_SW_HW_CTRL Read back Byte 1[1:0] SS control by Byte 2 [6:5] RW 0 Enable software control of spread 6 SS_EN_SW1 RW 0 Software control of spread 00 = – 0.25%; 01 = OFF; 10 = OFF; 11 = – 0.5% 5 SS_EN_SW0 RW 1 4 Reserved 0 Reserved 3 REF_OE Disabled Enabled RW 1 Output Enable for REF 2 REF PWRDN REF output is disabled in Pow- er Down. REF output is enabled in Pow- er Down RW 0 Wake-on LAN for REF. To have REF output enabled in Power Down, REF_OE needs to be enabled at the same time. Data Sheet Control Registers silabs.com | Building a more connected world. Rev. 1.0 | 34 |
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