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STM32U545NET3QTR 데이터시트(PDF) 209 Page - STMicroelectronics

부품명 STM32U545NET3QTR
상세설명  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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STM32U545NET3QTR 데이터시트(HTML) 209 Page - STMicroelectronics

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DS14216 Rev 1
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STM32U545xx
Electrical characteristics
258
Output voltage levels
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized in
Table 33. All I/Os are CMOS- and TTL-compliant (FT OR TT unless otherwise specified).
Table 94. Output voltage characteristics (all I/Os except FT_c,
FT_t in VBAT mode, and FT_o I/Os(1))(2)(3)
Symbol
Parameter
Conditions
Min
Max
Unit
VOL
Output low-level voltage
CMOS port(4), |IIO| = 8 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
V
VOH
Output high-level voltage
VDDIOx - 0.4
-
VOL(5)
Output low-level voltage
TTL port(4),|IIO| = 8 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
VOH(5)
Output high-level voltage
2.4
-
VOL(5)
Output low-level voltage
All I/Os, |IIO| = 20 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-1.3
VOH(5)
Output high-level voltage
VDDIOx - 1.3
-
VOL(5)
Output low-level voltage
|IIO| = 4 mA,
1.58 V ≤ VDDIOx ≤ 3.6 V
-0.4
VOH(5)
Output high-level voltage
VDDIOx - 0.4
-
VOL(5)
Output low-level voltage
|IIO| = 1 mA,
1.08 V ≤ VDDIOx <3.6 V
-0.4
VOH(5)
Output high-level voltage
VDDIOx - 0.4
-
VOLFM+(5)
Output low-level voltage for
a FT_f I/O pin in FM+ mode
|IIO| = 20 mA,
2.7 V ≤ VDDIOx ≤ 3.6 V
-0.4
|IIO| = 10 mA,
1.58 V ≤ VDDIOx ≤ 3.6 V
-0.4
|IIO| = 2 mA,
1.08 V ≤ VDDIOx < 3.6 V
-0.4
1. FT_t I/O characteristics are degraded only in VBAT mode (refer to Table 95).
2. The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For
instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.
3. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 31:
Current characteristics, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must always
respect the absolute maximum ratings ΣIIO.
4. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
5. Specified by design. Not tested in production.
Table 95. Output voltage characteristics for FT_t I/Os in VBAT mode, and for FT_o I/Os(1)
Symbol
Parameter
Conditions
Min
Max
Unit
VOL
Output low-level voltage |I
IO| = 0.5 mA, 2.7 V ≤ VBAT ≤ 3.6 V,
VDD off
-0.4
V
VOH
Output high-level voltage
VDDIOx - 0.4
-
VOL
Output low-level voltage |I
IO| = 0.25 mA, 1.58 V ≤ VBAT ≤ 3.6 V,
VDD off
-0.4
VOH
Output high-level voltage
VDDIOx - 0.4
-
1. Specified by design. Not tested in production.



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