| 전자부품 데이터시트 검색엔진 |
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TSB582 데이터시트(PDF) 18 Page - STMicroelectronics |
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TSB582 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 34 page ![]() Figure 28. EMI rejection ratio vs. frequency EMIRR performance might be improved by adding small capacitances (in the pF range) on the inputs, power supply, and output pins. These capacitances help in minimizing the impedance of these nodes at high frequencies. 5.4 Input offset voltage drift versus temperature The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset (Vio) is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift overtemperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift overtemperature is computed using Equation: ∆ Vio∆ T=maxVioT−Vio25°C T−25°C T= −40°C to T=125°C (2) The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 1.3. 5.5 Maximum power dissipation The usable output load current drive is limited by the maximum power dissipation allowed by the device package. The absolute maximum junction temperature for the TSB582 is 150 °C. The junction temperature can be estimated as follows: Tj=Pd×Rtℎja+Ta (3) TJ is the die junction temperature Pd is the power dissipated in the package Rthja is the junction to ambient thermal resistance of the package Ta is the ambient temperature The power dissipated in the package Pd is the sum of three main sources of both amplifier channels. The quiescent power, the power dissipated by the output stage transistor, and the input protection circuit in case the differential input voltage is forced to |Vid| > 1.3 V (see Section 5.2 ESD and input protection). It is calculated as follows. Pd=Pd_amp1+Pd_amp2 (4) Pd_amp=Vcc×Icc+ Vcc+−Vout ×Iload+ Vid − 1.3V ×Vid 1.5kΩ ifVid>1.3V (5) TSB582 Input offset voltage drift versus temperature DS13378 - Rev 2 page 18/34 |
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