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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SN250 데이터시트(PDF) 52 Page - STMicroelectronics |
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SN250 데이터시트(HTML) 52 Page - STMicroelectronics |
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52 / 130 page  Functional description—application modules SN250 52/130 Full I2C frames have to be constructed under software control by generating individual I2C segments. All necessary segment transitions are shown in Figure 7. ACK or NACK generation of an I2C receive frame segment is determined with the register bit SC_I2CACK in the SC1_I2CCTRL2 register. Figure 7. I2C segment transitions Generation of a 7-bit address is accomplished with one transmit segment. The upper 7 bits of the transmitted character contain the 7-bit address. The remaining lower bit contains the command type (“read” or “write”). Generation of a 10-bit address is accomplished with two transmit segments. The upper 5 bits of the first transmit character must be set to 0x1E. The next 2 bits are for the 2 most significant bits of the 10-bit address. The remaining lower bit contains the command type 3 ---- SC1-4M mode Illegal 3 ---- SC1-4A mode Illegal Table 23. SC1 I2C master frame segments (continued) SC1_I2CCTRL1 Frame Segments |
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