ADIS16201

Data Sheet

Rev. C | Page 4 of 32

Parameter

Conditions

Min

Typ

Max

Unit

DAC OUTPUT

5 kΩ/100 pF to GND

Resolution

12

Bits

Relative Accuracy

For Code 101 to Code 4095

4

LSB

Differential Nonlinearity

1

LSB

Offset Error

±5

mV

Gain Error

±0.5

%

Output Range

0 to 2.5

V

Output Impedance

2

Ω

Output Settling Time

10

µs

LOGIC INPUTS

2.0

V

0.8

V

±0.2

±1

µA

−40

−60

μA

10

pF

DIGITAL OUTPUTS

2.4

V

0.4

V

SLEEP TIMER

Timeout Period3

0.5

128

Seconds

FLASH MEMORY

Endurance4

20,000

Cycles

Data Retention5

20

Years

CONVERSION RATE

Minimum Conversion Time

244

μs

Maximum Conversion Time

484

ms

Maximum Throughput Rate

4096

SPS

Minimum Throughput Rate

2.066

SPS

POWER SUPPLY

Operating Voltage Range VDD

3.0

3.3

3.6

V

Power Supply Current

Normal mode, SMPL_TIME ≥

11

14

mA

Fast mode, SMPL_TIME ≤ 0x07

36

42

mA

Sleep mode, at 25°C

500

750

µA

Turn-On Time6

130

ms

1

Guaranteed by iMEMs packaged part testing, design, and/or characterization.

2

3

Guaranteed by design.

4

Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C.

5

6

The start-up time defines the time from VDD > 3.0 V to the first output register update. This parameter does not account for filter settling, which depends on the

SMPL_PRD and AVG_CNT settings.