ADIS16201SLASHPCB datasheet(19/32 Pages) AD

19 / 32 page

Data Sheet

ADIS16201

Rev. C | Page 19 of 32

CONTROL REGISTER DETAILS

The control registers in the ADIS16201 are 16 bits in length.

Each of them has been assigned an address for their upper byte

and lower byte. The bit map of each control register uses the

numerical assignments that are displayed in the following table.

MSB

LSB

The upper byte consists of Bit 8 to Bit 15, and the lower byte

consists of Bit 0 to Bit 7. Each of the following sections provides

a description of each register that includes purpose, relevant

scaling information, bit maps, addresses, and default values.

CALIBRATION

The ADIS16201 outputs are precalibrated at the factory, providing

a high degree of accuracy and simpler system implementation.

In addition, for system or field updates, the device has eight

control registers associated with calibrating the acceleration and

inclination output data (see the Calibration Register Definitions

section). Each of these registers has read/write capability and is

16 bits (2 bytes) in length. All calibration registers are 12 bits in

length, with the exception of the inclination offset registers, which

are 9 bits in length. All data values are aligned to the LSB. The

OFFSET registers all utilize the twos complement format

allowing for both positive and negative offsets. All scale registers

utilize the straight binary format.

The data within these eight calibration registers is utilized in

offsetting and scaling of the output data registers according to

the following relationship:

(

)

Output

where:

x represents the raw data prior to calibration.

C is the offset.

A is the scalar.

Output represents the output data register where the resultant

data is stored.

All four inertial sensor outputs (X and Y acceleration, X and Y

inclination) have their own independent set of calibration

registers.

Simple access to these registers enables field calibration to

correct for in-system error sources. In particular, the offset

control registers allow the user to reset to 0°/0 mg reference

point for the device. This is particularly important when

considering the stack-up of the tolerances in mounting the

ADIS16201 to a printed circuit board (PCB), the PCB to an

enclosure, the enclosure mounted to the chassis of a piece of

equipment, and so on.

The result is that the ADIS16201 mechanical reference can be

offset several degrees from that of the end equipment

mechanical reference, resulting in an accumulation of offset

errors in the inclination and acceleration data output registers.

The offset registers provide a convenient tool for managing

these types of errors.

A global command is implemented within the ADIS16201 to

simplify the loading of the offsets. Once the end piece of

equipment is leveled to its desired reference point, a null

command can be sent to the ADIS16201 via the command

control register, which zeros the two acceleration and the two

inclination output data registers. This command loads all four

offset registers with the inverse of their contents at the time of

the null command. Consequently, on the next reading of the

seven output data registers, the two acceleration and two

inclination output data registers should be reset to mid-scale

(neglecting noise and repeatability limitations). It is suggested

that when the null command is implemented, the AVG_CNT

control register be set to 08h in order to maximize the filtering

and reduce the effects of noise in determining the values to be

loaded into the offset control registers. Optionally, the user can

manually load each of the eight calibration registers via the SPI

in order to calibrate the end system. This is applicable when the

user plans to adjust the scale factors, thus requiring an external

stimulus to excite the ADIS16201.

CALIBRATION REGISTER DEFINITIONS

XACCL_OFF Register Definition

Address

Scale1

Default

Format

Access

0x11, 0x10

0.4624 mg

0x0000

Twos

complement

R/W

Scale is the weight of each LSB.

The XACCL_OFF register is the user-controlled register for

calibrating system-level acceleration offset errors. For the X-axis

acceleration, it represents the C variable in the calibration

equation. The maximum calibration range is +0.945 g, or

+2047/−2048 codes, assuming nominal sensor sensitivity. The

contents of this register are nonvolatile.

Table 11. XACCL_OFF Bit Designations

Bit

Description

15:12

Not used

11:0

Data bits

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