26

MC68L300EC16/D

Figure 24 Pulse Accumulator — Using TOF as Gated Mode Clock

Figure 25 PWMx (PWMx Register = 01, Fast Mode)

NOTE: 1.

TCNT counts as a result of PHI1*/4; PACNT counts when TCNT overflows from $FFFF to $0000 and the

conditioned PAI signal is asserted.

2.

*PHI1 has the same frequency as the system clock; however, it does not have the same timing.

$FFFE

$FFFF

$0000

$77

$78

PHI1*

PHI1*/4

EXT PIN (PAI)

TCNT

PACNT

NOTE: 1.

*PAI1 is the same frequency as the system clock; however, it does not have the same timing.

2.

When the counter rolls over from $FF to $00, the PWM pin is set to logic level one.

3.

When the counter equals the PWM register, the PWM pin is cleared to a logic level zero.

$FF

$00

$01

$02

PHI1*

PHI1*/2

PWMCNT (7:0)

EXT PIN (PMWx)

Freescale Semiconductor, Inc.

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