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ADV7393 데이터시트(PDF) 36 Page - Analog Devices |
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ADV7393 데이터시트(HTML) 36 Page - Analog Devices |
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36 / 96 page ![]() ADV7390/ADV7391/ADV7392/ADV7393 Rev. 0 | Page 36 of 96 Table 25. Register 0x88 to Register 0x89 SR7 to Bit Number Reset SR0 Register Bit Description 7 6 5 4 3 2 1 0 Register Setting Value Reserved. 0 0x00 0 Disabled SD Noninterlaced Mode. 1 Enabled 0 Disabled SD Double Buffering. 1 Enabled 0 0 8-bit input 0 1 16-bit input1 1 0 10-bit input1 SD Input Format. 1 1 Reserved 0 Disabled SD Digital Noise Reduction. 1 Enabled 0 Disabled SD Gamma Correction Enable. 1 Enabled 0 Gamma Correction Curve A 0x88 SD Mode Register 7 SD Gamma Correction Curve Select. 1 Gamma Correction Curve B 0 0 Disabled 0x00 0 1 −11 IRE 1 0 −6 IRE SD Undershoot Limiter. 1 1 −1.5 IRE Reserved. 0 0 must be written to this bit 0 Disabled SD Black Burst Output on DAC Luma. 1 Enabled 0 0 Disabled 0 1 4 clock cycles 1 0 8 clock cycles SD Chroma Delay. 1 1 Reserved 0x89 SD Mode Register 8 Reserved. 0 0 0 must be written to these bits 1 Available on the ADV7392/ADV7393 (40-pin devices) only. |
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