 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ADV7393 데이터시트(PDF) 86 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7393 데이터시트(HTML) 86 Page - Analog Devices |
|
|
86 / 96 page  ADV7390/ADV7391/ADV7392/ADV7393 Rev. 0 | Page 86 of 96 Table 67. 10-Bit 525i YCrCb In (EAV/SAV), RGB Out Subaddress Setting Description 0x17 0x02 Software reset. 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x02 0x10 RGB output enabled. RGB output sync enabled. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xC9 Pixel data valid. YPrPb out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled. 0x88 0x10 10-bit input enabled. Table 68. 10-Bit 525i YCrCb In, RGB Out Subaddress Setting Description 0x17 0x02 Software reset. 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x02 0x10 RGB output enabled. RGB output sync enabled. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xC9 Pixel data valid. YPrPb out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled. 0x88 0x10 10-bit input enabled. 0x8A 0x0C Timing Mode 2 (Slave). HSYNC/VSYNC synchronization. Table 69. 16-Bit 525i YCrCb In, YPrPb Out Subaddress Setting Description 0x17 0x02 Software reset. 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xC9 Pixel data valid. YPrPb out. SSAF PrPb filter enabled. Active video edge control enabled. pedestal enabled. 0x88 0x08 16-bit input enabled. 0x8A 0x0C Timing Mode 2 (Slave). HSYNC/VSYNC synchronization. Table 70. 16-Bit 525i YCrCb In, RGB Out Subaddress Setting Description 0x17 0x02 Software reset 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x02 0x10 RGB output enabled. RGB output sync enabled. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xC9 Pixel data valid. YPrPb out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled. 0x88 0x08 16-bit input enabled. 0x8A 0x0C Timing Mode 2 (Slave). HSYNC/VSYNC synchronization. Table 71. 16-Bit 525i RGB In, YPrPb Out Subaddress Setting Description 0x17 0x02 Software reset. 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xC9 Pixel data valid. YPrPb out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled. 0x87 0x80 RGB input enabled. 0x88 0x08 16-bit input enabled. 0x8A 0x0C Timing Mode 2 (Slave). HSYNC/VSYNC synchronization. Table 72. 16-Bit 525i RGB In, CVBS/Y-C Out Subaddress Setting Description 0x17 0x02 Software reset. 0x00 0x1C All DACs enabled. PLL enabled (16×). 0x01 0x00 SD input mode. 0x80 0x10 NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled. 0x82 0xCB Pixel data valid. CVBS/S-Video out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled. 0x87 0x80 RGB input enabled. 0x88 0x08 16-bit input enabled. 0x8A 0x0C Timing Mode 2 (Slave). HSYNC/VSYNC synchronization. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
