| 전자부품 데이터시트 검색엔진 |
|
74LVC16374ADGG 데이터시트(PDF) 10 Page - Nexperia B.V. All rights reserved |
|
|
|||||||||||||||||||||||||||||
74LVC16374ADGG 데이터시트(HTML) 10 Page - Nexperia B.V. All rights reserved |
|
10 / 13 page ![]() Nexperia 74LVC16374A; 74LVCH16374A 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state 11. Package outline References Outline version European projection Issue date IEC JEDEC JEITA SOT362-1 MO-153 sot362-1_po 03-02-19 13-08-05 Unit mm max nom min 0.15 0.28 0.2 12.6 0.5 0.8 A Dimensions (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 A1 A2 1.05 A3 bp c D(1) 8° θ E(2) e HE L 1 Lp Q v w 1.2 0.25 0.1 0.25 0.08 y Z 7.9 0.4 6.0 0.35 0.05 0.17 0.1 12.4 0.4 0° 0.85 8.3 0.8 6.2 0.50 pin 1 index v A θ A D Lp Q E Z c L 1 24 48 25 e w y X A HE bp A1 A2 detail X (A3) 0 5 mm scale 2.5 Fig. 10. Package outline SOT362-1 (TSSOP48) 74LVC_LVCH16374A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 13 — 27 September 2021 10 / 13 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |