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MC68340 데이터시트(PDF) 239 Page - Freescale Semiconductor, Inc

부품명 MC68340
상세설명  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 데이터시트(HTML) 239 Page - Freescale Semiconductor, Inc

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MC68340 USER’S MANUAL
MOTOROLA
Instruction
Head
Tail
Cycles
EXG
Rn, Rm
2
0
4(0/1/0)
MOVEC
Cr, Rn
10
0
14(0/2/0)
MOVEC
Rn, Cr
12
0
14-16(0/1/0)
MOVE
CCR, Dn
2
0
4(0/1/0)
MOVE
CCR,
〈CEA〉
0
2
4(0/1/1)
MOVE
Dn, CCR
2
0
4(0/1/0)
MOVE
〈FEA〉, CCR
0
0
4(0/1/0)
MOVE
SR, Dn
2
0
4(0/1/0)
MOVE
SR,
〈CEA〉
0
2
4(0/1/1)
MOVE
Dn, SR
4
−2
10(0/3/0)
MOVE
〈FEA〉, SR
0
−2
10(0/3/0)
MOVEM.W
〈CEA〉, RL
10
8
+ n × 4 (n + 1, 2, 0) ∗
MOVEM.W
RL,
〈CEA〉
10
8
+ n × 4 (0, 2, n) ∗
MOVEM.L
〈CEA〉, RL
1
0
12
+ n × 4(2n + 2, 2, 0)
MOVEM.L
RL,
〈CEA〉
12
10
+ n × 4 (0, 2, 2n)
MOVEP.W
Dn, (d16, An)
2
0
10(0/2/2)
MOVEP.W
(d 16, An), Dn
1
2
11(2/2/0)
MOVEP.L
Dn, (d16, An)
2
0
14(0/2/4)
MOVEP.L
(d 16, An), Dn
1
2
19(4/2/0)
MOVES (Save)
〈CEA〉, Rn
1
1
3(0/1/0)
MOVES (Op)
〈CEA〉, Rn
7
1
11(X/1/0)
MOVES (Save)
Rn,
〈CEA〉
1
1
3(0/1/0)
MOVES (Op)
Rn,
〈CEA〉
9
2
12(0/1/X)
MOVE
USP, An
0
0
2(0/1/0)
MOVE
An, USP
0
0
2(0/1/0)
SWAP
Dn
4
0
6(0/1/0)
X
= There is one bus cycle for byte and word operands and two bus cycles for long
operands. For long bus cycles, add two clocks to the tail and to the number of
cycles.
∗= Each bus cycle may take up to four clocks without increasing total execution time.
Cr
= Control registers USP, VBR, SFC, and DFC
n
= Number of registers to transfer
RL
= Register List
<= Maximum time (certain data or mode combinations may execute faster).
NOTE:
The MOVES instruction has an additional save step which other instructions do not
have. To calculate the total instruction time, calculate the save, the EA, and the
operation execution times, and combine in the order listed, using the equations
given in 5.7.1.6 Instruction Execution Time Calculation.
5.7.3.5 ARITHMETIC/LOGIC INSTRUCTIONS. The arithmetic/logic instruction table
indicates the number of clock periods needed to perform the specified arithmetic/logical
instruction using the specified addressing mode. Footnotes indicate when to account for
the appropriate EA times. The total number of clock cycles is outside the parentheses.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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