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MC68340 데이터시트(PDF) 166 Page - Freescale Semiconductor, Inc

부품명 MC68340
상세설명  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 데이터시트(HTML) 166 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
5- 29
5.3.3.10 CONDITION TESTS. Conditional program control instructions and the TRAPcc
instruction execute on the basis of condition tests. A condition test is the evaluation of a
logical expression related to the state of the CCR bits. If the result is 1, the condition is
true. If the result is 0, the condition is false. For example, the T condition is always true,
and the EQ condition is true only if the Z-bit condition code is true. Table 5-12 lists each
condition test.
Table 5-12. Condition Tests
Mnemonic
Condition
Encoding
Test
T
True
0000
1
F*
False
0001
0
HI
High
0010
C
• Z
LS
Low or Same
0011
C + Z
CC
Carry Clear
0100
C
CS
Carry Set
0101
C
NE
Not Equal
0110
Z
EQ
Equal
0111
Z
VC
Overflow Clear
1000
V
VS
Overflow Set
1001
V
PL
Plus
1010
N
MI
Minus
1011
N
GE
Greater or Equal
1100
N
• V + N • V
LT
Less Than
1101
N
• V + N • V
GT
Greater Than
1110
N
• V • Z+ N • V • Z
LE
Less or Equal
1111
Z + N
• V + N • V
* Not available for the Bcc instruction.
•
= Boolean AND
+ = Boolean OR
N = Boolean NOT
5.3.4 Using the TBL Instructions
There are four TBL instructions. TBLS returns a signed, rounded byte, word, or long-word
result. TBLSN returns a signed, unrounded byte, word, or long-word result. TBLU returns
an unsigned, rounded byte, word, or long-word result. TBLUN returns an unsigned,
unrounded byte, word, or long-word result. All four instructions support two types of
interpolation data: an n-element table stored in memory and a two-element range stored in
a pair of data registers. The latter form provides a means of performing surface (3D)
interpolation between two previously calculated linear interpolations.
The following examples show how to compress tables and use fewer interpolation levels
between table entries. Example 1 (see Figure 5-7) demonstrates TBL for a 257-entry
table, allowing up to 256 interpolation levels between entries. Example 2 (see Figure 5-8)
reduces table length for the same data to four entries. Example 3 (see Figure 5-9)
demonstrates use of an 8-bit independent variable with an instruction.
Freescale Semiconductor, Inc.
For More Information On This Product,
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