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CS43L21 데이터시트(PDF) 18 Page - Cirrus Logic

부품명 CS43L21
상세설명  Low Power, Stereo Digital to Analog Converter
PDF  63 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L21 데이터시트(HTML) 18 Page - Cirrus Logic

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18
DS723A1
CS43L21
SWITCHING SPECIFICATIONS - I²C® CONTROL PORT
(Inputs: Logic 0 = DGND, Logic 1 = VL, SDA CL =30pF)
13. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
Parameter
Symbol
Min
Max
Unit
SCL Clock Frequency
fscl
-
100
kHz
RESET Rising Edge to Start
tirs
500
-
ns
Bus Free Time Between Transmissions
tbuf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
µs
Clock Low time
tlow
4.7
-
µs
Clock High Time
thigh
4.0
-
µs
Setup Time for Repeated Start Condition
tsust
4.7
-
µs
SDA Hold Time from SCL Falling
(Note 13)
thdd
0-
µs
SDA Setup time to SCL Rising
tsud
250
-
ns
Rise Time of SCL and SDA
trc
-1
µs
Fall Time SCL and SDA
tfc
-
300
ns
Setup Time for Stop Condition
tsusp
4.7
-
µs
Acknowledge Delay from SCL Falling
tack
300
3450
ns
t
buf
t
hdst
t
hdst
t
low
t r
t f
t
hdd
t
high
t sud
t sust
t susp
Stop
Start
Start
Stop
Repeated
SDA
SCL
t
irs
RST
Figure 6. Control Port Timing - I²C



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