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TMPR4925 데이터시트(PDF) 73 Page - Toshiba Semiconductor

부품명 TMPR4925
상세설명  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 데이터시트(HTML) 73 Page - Toshiba Semiconductor

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Chapter 3 Signals
3-15
Table 3.2.3 Boot Configuration When SyncFlash is Used as Boot Memory
Signal
Description
Corresponding
Register Bit
Configuration
Determined at
ADDR[13]
Boot ROM Bus Width
Specifies the data bus width when booting from SyncFlash memory.
L = 32 bits
H = 16 bits
SDCCR0.MW
RESET* deassert edge
ADDR[5,2]
Boot SyncFlash Memory Row Size
Specifies the SyncFlash memory row size when booting from
SyncFlash memory.
LH = Reserved
LL = 13 bits
HH = 12 bits
HL = 11 bits
SDCCR0.RS
RESET* deassert edge
ADDR[12:11]
Boot SyncFlash Memory Column Size
Specifies the SyncFlash memory column size when booting from
SyncFlash memory.
HH = 11 bits
HL = 9 bits
LH = 10 bits
LL = 8 bits
SDCCR0.CS
RESET* deassert edge



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