Data Sheet G14309EJ2V0DS00

18

µµµµPC1909

4. SETTINGS

4.1 Controller Settings

The feedback circuit for when the converter output voltage is detected on the secondary side is configured as shown in

Figure 4-1 below. The feedback gain is primarily determined by the R1 resistor.

Figure 4-1. Feedback Circuit Configuration

VREF

R1

GND

FB

IK

12

3

14

From comparator output

Shunt regulator

Photo-

coupler

PWM comparator 1

PWM comparator 2

To output circuit of OUT1

To output circuit of OUT2

The voltage of the FB pin is input to PWM comparators 1 and 2.

During steady operation (DTC2 < FB < DTC1), the duty of OUT1 and OUT2 is determined by the slice level of the

triangle wave based on the FB pin voltage.

Caution

When using a shunt regulator such as the

µµµµPC1093 for the secondary-side detector, Ik must be

set bearing in mind the variation of the CTR in the photocoupler. Also, be sure to use the

photocoupler grounded at the emitter ground.

4.2 Startup Circuit, Low Voltage Malfunction Prevention Circuit Settings

The startup circuit is configured as shown in Figure 4-2 below.

Figure 4-2. Startup Circuit

VREF

VCC

VCC IN

R3

R4

C3

C2

C1

GND

DTC1

13

3

9

R2

D1

NZ

NP

14

Primary coil

5