Data Sheet G14309EJ2V0DS00

22

µµµµPC1909

The results of measuring fOSC vs. RT are shown in Figure 4-5 below, with CT as the parameter.

Figure 4-5. Relationship Between Oscillation Frequency (fOSC), Timing Capacitor (CT) and Timing Resistor (RT)

10

50

500

100

1000

50

100

CT = 220 pF

CT = 470 pF

CT = 1000 pF

RT - Timing Resistance - k

Ω

4.4 Dead Time Setting

The period in which OUT1 and OUT2 are simultaneously off is called dead time. This is an important parameter to

realize a zero-cross switch when active-clamping. To set the dead time, it is necessary to adjust both the oscillation

frequency and level shift parameters (for details of the oscillation frequency setting, refer to 4.3 Oscillator Settings).

4.4.1 Level shift setting

Whichever is higher of the DTC2 pin and FB pin voltages is compared with the triangle wave that is the internally level-

shifted wave of the CT pin (dCT). OUT2 is high level while dCT is higher than the DTC2 and FB voltages.

The triangle wave dCT, which controls OUT2, is generated by internally level-shifting the CT wave on the low potential

side. The amount of shift (Vd) is determined using the resistor (RCT2) connected between the CT2 and VREF pins.

Vd can be calculated from the following equation.

Vd

[V]

RCT2 [k

Ω] + 10

2

× 4.2

A general diagram of the level shift circuit (OLS) is shown in Figure 4-6, and the relationship between the oscillation

frequency (fOSC), the dead time (tqd), and resistor RCT2 is shown in Figure 4-7.