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LXT386LE 데이터시트(PDF) 33 Page - Intel Corporation

부품명 LXT386LE
상세설명  QUAD T1/E1/J1 Transceiver
PDF  78 Pages
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제조업체  INTEL [Intel Corporation]
홈페이지  http://www.intel.com
Logo INTEL - Intel Corporation

LXT386LE 데이터시트(HTML) 33 Page - Intel Corporation

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QUAD T1/E1/J1 Transceiver — LXT386
Datasheet
33
3.8
G.772 Performance Monitoring
The LXT386 can be configured as a quad line interface unit with all channels working as regular
transceivers. In applications using only three channels, the fourth channel can be configured to
monitor any of the remaining channels inputs or outputs. The monitoring is non-intrusive per ITU-
T G.772. Figure 2 on page 8 illustrates this concept.
The monitored line signal (input or output) goes through channel 0 clock and data recovery. The
signal can be observed digitally at the RCLK/RPOS/RNEG outputs. This feature can also be used
to create timing interfaces derived from an E1 or T1 signal.
In addition, channel 0 can be configured to a Remote Loopback while in monitoring mode (TCLK0
must be active in order for this operation to take place). This will output the same data as in the
signal being monitored at the channel 0 output (TTIP/TRING). The output signal can then be
connected to a standard test equipment with a T1/E1 electrical interface for monitoring purposes
(non-intrusive monitoring).
Figure 12. TAOS Data Path
Figure 13. TAOS with Analog Loopback
TAOS mode
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
TTIP
TRING
RTIP
RRING
* If Enabled
MCLK
(ALL 1’s)
Timing &
Control
Timing
Recovery
JA*
TTIP
TRING
RTIP
RRING
RCLK
RPOS
RNEG
TCLK
TPOS
TNEG
* If Enabled
MCLK
TAOS Mode
Timing &
Control
Timing
Recovery
JA*
(ALL 1’s)



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