 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
LXT386LE 데이터시트(PDF) 44 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
LXT386LE 데이터시트(HTML) 44 Page - Intel Corporation |
|
|
44 / 78 page  LXT386 — QUAD T1/E1/J1 Transceiver 44 Datasheet Table 28. AIS Interrupt Enable Register, AISIE (14H) Bit1 Name Function 3-0 AISIE3-AISIE0 Transceiver 3-0 AIS interrupts are enabled by writing a “1” to the respective bit. 7-4 - Write “0” to these positions for normal operation. 1. On power-up all the register bits are set to “0”. Table 29. AIS Interrupt Status Register, AISIS (15H) Bit1 Name Function 3-0 AISIS3-AISIS0 These bits are set to “1” every time a AIS status change has occurred since the last clear interrupt in transceivers 3-0 respectively. 1. On power-up all the register bits are set to “0”. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
