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UPD16675AP/W 데이터시트(PDF) 31 Page - Renesas Technology Corp

부품명 UPD16675AP/W
상세설명  MOS INTEGRATED CIRCUIT
PDF  38 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD16675AP/W 데이터시트(HTML) 31 Page - Renesas Technology Corp

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29
µµµµPD16675A
(2) Serial interface
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Shift clock cycle
tCYK
SCK
900
ns
High level shift clock pulse
width
tWHK
SCK
400
ns
Low level shift clock pulse
width
tWLK
SCK
400
ns
Shift clock hold time
tHSTBK
STB
↓→SCK↓
1.5
µs
Data setup time
tDS1
DATA
→SCK↑
100
ns
Data hold time
tDH1
SCK
↑→DATA
400
ns
STB hold time
tHKSTB
SCK
↑→STB↑
1
µs
STB pulse width
tWSTB
1
µs
Wait time
tWAIT
8th CLK
↑→1st CLK↓
1
µs
Remark The TYP. value is a reference value when TA = 25
°C.
(3) Parallel interface (8-bit/4-bit)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Enable cycle time
tCYCE
E
↑→E↑
900
ns
High level enable pulse width
tWHE
E
400
ns
Low level enable pulse width
tWLE
E
400
ns
STB pulse width
tWSTB
1
µs
STB hold time
tHKSTB
1
µs
Enable hold time
tHSTBK
1.5
µs
Data setup time
tDS2
D0 to D7
→E↑
100
ns
Data hold time
tDH2
D0 to D7
→E↓
300
ns
Remarks 1. The TYP. value is a reference value when TA = 25
°C.
2. In 4-bit parallel mode, D0 to D3 = “L”.



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