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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD17708 데이터시트(PDF) 288 Page - Renesas Technology Corp |
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UPD17708 데이터시트(HTML) 288 Page - Renesas Technology Corp |
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288 / 358 page  286 µPD17704, 17705, 17707, 17708, 17709 18.6 Status at Reset 18.6.1 At power-ON reset The P1C0/FMIFC, P1C1/AMIFC, P2A0/FCG0, and P2A1/FCG1 pins are set in the general-purpose input port mode. 18.6.2 At WDT&SP reset The P1C0/FMIFC, P1C1/AMIFC, P2A0/FCG0, and P2A1/FCG1 pins are set in the general-purpose input port mode. 18.6.3 On execution of clock stop instruction The P1C0/FMIFC and P1C1/AMIFC pins are set in the general-purpose input port mode. The P2A0/FCG0 and P2A1/FCG1 pins are set in the general-purpose I/O port mode, and retain the previous input or output status. 18.6.4 At CE reset The P1C0/FMIFC and P1C1/AMIFC pins are set in the general-purpose input port mode. The P2A0/FCG0 and P2A1/FCG1 pins are set in the general-purpose I/O port mode, and retain the previous input or output status. 18.6.5 In halt status The P1C0/FMIFC, P1C1/AMIFC, P2A0/FCG0, and P2A1/FCG1 pins retain the status immediately before the halt mode is set. |
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