NAND04GA3C2A datasheet(26/51 Pages) STMICROELECTRONICS

26 / 51 page

6 Device operations

NAND04GA3C2A, NAND04GW3C2A

26/51

6.11

Read Electronic Signature

The device contains a Manufacturer Code and Device Code. To read these codes three steps

are required:

One Bus Write cycle to issue the Read Electronic Signature command (90h)

One Bus Write cycle to input the address (00h)

Four Bus Read Cycles to sequentially output the data (as shown in Table 10: Electronic

Signature).

Table 9.

Status Register Bits

Bit

Name

Logic Level

Definition

SR7

Write Protection

'1'

Not Protected

'0'

Protected

SR6(1)

Program/ Erase/ Read

Controller

'1'

P/E/R C inactive, device ready

'0'

P/E/R C active, device busy

Cache Ready/Busy

'1'

Cache Register ready (Cache Read only)

'0'

Cache Register busy (Cache Read only)

SR5

Program/ Erase/ Read

Controller(2)

'1'

P/E/R C inactive

'0'

P/E/R C active

SR4, SR3,

SR2, SR1

Reserved

Don’t Care

SR0(1)

Generic Error

‘1’

Error – operation failed

‘0’

No Error – operation successful

The SR6 bit and SR0 bit have a different meaning during Cache Read operations.

Only valid for Cache Read operations, for other operations it is same as SR6.

Table 10.

Electronic Signature

Part Number

Byte/Word 1

Byte/Word 2

Byte 3

(see Table 11)

Byte 4

(see Table 12)

Manufacturer

Code

Device code

NAND04GA3C2A

20h

DCh

84h

25h

NAND04GW3C2A

20h

DCh

84h

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