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ES9822PRO 데이터시트(PDF) 88 Page - ESS Technology,Inc |
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ES9822PRO 데이터시트(HTML) 88 Page - ESS Technology,Inc |
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88 / 126 page ![]() 0.3 ES9822 PRO Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 88 Register 94-93: PWM1 FREQUENCY Bits [15:0] Default 16'd0 Bits Mnemonic Description [15:0] PWM1_FREQ 16-bit value to set the frequency of the PWM signal in terms of SYS_CLK divisions. Valid from 16'h0000 to 16'hFFFF frequency (Hz)=SYS_CLK/(PWM1_FREQ+1) Duty Cycle (%) = (1-(PWM1_FREQ+1- PWM1_COUNT)/(PWM1_FREQ+1)) = (PWM1_COUNT/(PWM1_FREQ+1))*100 Register 95: PWM2 COUNT Bits [7:0] Default 8'd0 Bits Mnemonic Description [7:0] PWM2_COUNT 8-bit value to set the number of SYS_CLK periods the PWM signal is high for. Valid from 8'd0 to 8'd255 Register 97-96: PWM2 FREQUENCY Bits [15:0] Default 16'd0 Bits Mnemonic Description [15:0] PWM2_FREQ 16-bit value to set the frequency of the PWM signal in terms of SYS_CLK divisions. Valid from 16'h0000 to 16'hFFFF frequency (Hz)=SYS_CLK/(PWM2_FREQ+1) Duty Cycle (%) = (1-(PWM2_FREQ+1- PWM2_COUNT)/(PWM2_FREQ+1)) = (PWM2_COUNT/(PWM2_FREQ+1))*100 Register 98: PWM3 COUNT Bits [7:0] Default 8'd0 Bits Mnemonic Description [7:0] PWM3_COUNT 8-bit value to set the number of SYS_CLK periods the PWM signal is high for. Valid from 8'd0 to 8'd255 Register 100-99: PWM3 FREQUENCY |
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