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VSC8541XMV-05 데이터시트(PDF) 84 Page - Microchip Technology

부품명 VSC8541XMV-05
상세설명  Single Port Gigabit Ethernet Copper PHY with GMII/RGMII/MII/RMII Interfaces
PDF  101 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

VSC8541XMV-05 데이터시트(HTML) 84 Page - Microchip Technology

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Electrical Specifications
VMDS-10513 VSC8541-02 Datasheet Revision 4.1
75
Figure 31 •
Compensated Input RGMII Timing
Figure 32 •
Compensated Output RGMII Timing
5.2.13
Start of Frame Indication
This section contains the AC specifications for the SOF indication signals.
Table 111 •
PHY Output (RX_CLK Delay When Register 20E2.[6:4]=100’b)
Parameter
Symbol
Minimum
Typical
Maximum Unit
Data to clock setup (RX_CLK
delay = 100’b)
tSETUP_R 1.4
2.0
ns
Clock to data hold (RX_CLK
delay = 100’b)
tHOLD_R 1.5
2.0
ns
Table 112 •
Start of Frame Indication AC Characteristics
Parameter
Symbol
Minimum
Typical Maximum
Unit Condition
TX_SOF_CLK/
RX_SOF_CLK frequency
fFREQ
125 - 100 ppm 125
125 + 100 ppm MHz
TX_SOF_CLK/
RX_SOF_CLK stability
fSTABILITY
1.75
ppm
TX_SOF_CLK/
RX_SOF_CLK duty cycle
DC
40
60
%
TX_SOF_CLK/
RX_SOF_CLK peak-to-peak jitter
JPPCLK_SOF
350
ps
10 k samples
TX_SOF_CLK/
RX_SOF_CLK rise time
tR
0.9
ns
20% to 80%
TX_SOF_CLK/
RX_SOF_CLK fall time
tF
0.9
ns
20% to 80%
tSETUP_T
TXD[3:0]
TX_CTL
TX_CLK
TXD[3:0]
TXD[7:4]
TXEN
TXERR
tHOLD_T
RXD[3:0]
RX_CTL
RX_CLK
RXD[3:0]
RXD[7:4]
RXEN
RXERR
tSETUP_R
RX_CLK with
Internal
Delay Added
tHOLD_R
RX_CLK delay = 100 'b



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