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WM8580 데이터시트(PDF) 29 Page - Wolfson Microelectronics plc

부품명 WM8580
상세설명  Multichannel CODEC with S/PDIF Transceiver
PDF  92 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8580 데이터시트(HTML) 29 Page - Wolfson Microelectronics plc

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Production Data
WM8580
w
PD Rev 4.0 February 2007
29
DAC FEATURES
DAC INPUT CONTROL
The Primary Audio Interface Receiver has a separate input pin for each stereo DAC. Any input pin
can be routed to any DAC using the DACSEL register bits.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
1:0
DAC1SEL
[1:0]
00
3:2
DAC2SEL
[1:0]
01
R15
DAC CONTROL 1
0Fh
5:4
DAC3SEL
[1:0]
10
DAC digital input select
00 = DAC takes data from DIN1
01 = DAC takes data from DIN2
10 = DAC takes data from DIN3
Table 17 DAC Input Select Register
DAC OVERSAMPLING CONTROL
For sampling clock ratios of 256fs to 1152fs the DACs should be programmed to operate at 128
times oversampling rate. For sampling clock ratios of 128fs and 192fs, the DACs must be
programmed to operate at 64 times oversampling rate. The DACOSR register bit selects between
128x and 64x oversampling.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R12
PAIF 3
0Ch
6
DACOSR
0
DAC Oversampling Rate Control
0= 128x oversampling
1= 64x oversampling
Table 18 DAC Oversampling Register
DAC OUTPUT CONTROL
The DAC output control word determines how the left and right inputs to the audio interface are
applied to the left and right DACs:
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
PL[3:0]
Left O/P
Right O/P
0000
Mute
Mute
0001
Left
Mute
0010
Right
Mute
0011
(L+R)/2
Mute
0100
Mute
Left
0101
Left
Left
0110
Right
Left
0111
(L+R)/2
Left
1000
Mute
Right
1001
Left
Right
1010
Right
Right
1011
(L+R)/2
Right
1100
Mute
(L+R)/2
1101
Left
(L+R)/2
1110
Right
(L+R)/2
R16
DAC CONTROL 2
10h
3:0
PL[3:0]
1001
1111
(L+R)/2
(L+R)/2
Table 19 DAC Attenuation Register (PL)



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