AT83SND1CXXX-ROTIL datasheet(128/212 Pages) ATMEL

128 / 212 page

128

4109J–8051–10/06

AT8xC51SND1C

Reset Value = 1111 1111b

15.8.0.6

Table 108. MMCMD Register

MMCMD (S:DDh) – MMC Command Register

Reset Value = 1111 1111b

15.8.0.7

Table 109. MMDAT Register

MMDAT (S:DCh) – MMC Data Register

Reset Value = 1111 1111b

15.8.0.8

Table 110. MMCLK Register

MMCLK (S:EDh) – MMC Clock Divider Register

2F1FM

FIFO 1 Full Interrupt Mask Bit

Set to prevent F1FI flag from generating an MMC interrupt.

Clear to allow F1FI flag to generate an MMC interrupt.

1F2EM

FIFO 2 Empty Interrupt Mask Bit

Set to prevent F2EI flag from generating an MMC interrupt.

Clear to allow F2EI flag to generate an MMC interrupt.

0F1EM

FIFO 1 Empty Interrupt Mask Bit

Set to prevent F1EI flag from generating an MMC interrupt.

Clear to allow F1EI flag to generate an MMC interrupt.

Bit

Number

Bit

Mnemonic

Description

7654

3210

MC7

MC6

MC5

MC4

MC3

MC2

MC1

MC0

Bit

Number

Bit

Mnemonic

Description

7 - 0

MC7:0

MMC Command Receive Byte

Output (read) register of the response FIFO.

MMC Command Transmit Byte

Input (write) register of the command FIFO.

7654

3210

MD7

MD6

MD5

MD4

MD3

MD2

MD1

MD0

Bit

Number

Bit

Mnemonic

Description

7 - 0

MD7:0

MMC Data Byte

Input (write) or output (read) register of the data FIFO.

7654

3210

MMCD7

MMCD6

MMCD5

MMCD4

MMCD3

MMCD2

MMCD1

MMCD0

AT83SND1CXXX-ROTIL 데이터시트(PDF) 128 Page - ATMEL Corporation

AT83SND1CXXX-ROTIL 데이터시트(HTML) 128 Page - ATMEL Corporation

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